PUG : A Symbolic Verifier of GPU Programs

There is increasing interest in utilizing Graphical Processing Units for general-purpose computations. While substantial effort has been made on improving the programmability and performance of General Purpose GPU systems, little attention has been paid to verifying the correctness of the programs running on these systems. We present a preliminary automated symbolic verifier based on mechanical decision procedures which is able to prove functional correctness of CUDA programs and detect bugs such as race conditions. The concurrent behavior of CUDA kernels is modeled by a constraint formula containing symbolic variables, whose satisfiability indicates whether the correctness is ensured or a bug is found. This modeling enables the formal study of memory consistency models and relevant compilation / optimization issues in CUDA. To mitigate the interleaving explosion problem we employ a symbolic partial order reduction (POR) technique. We also investigate other static techniques such as loop abstraction to improve the analysis performance. As one of the applications, our tool can be used to check equivalence of CUDA programs.